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Mingjun LI (李明峻)Ph.D. Student
Department of Computer Science and Engineering |
I am a Ph.D. candidate at the Department of Computer Science and Engineering, the Chinese University of Hong Kong (CUHK), supervised by Prof. Bei YU since 2023 Fall.
Prior to that, I was a research assistant at the School of Computer Science and Engineering of Beihang University, supervised by Prof. Jianlei YANG, from 2021 to 2023.
I obtained my B.Eng. degree in the School of Automation Science and Engineering from Beihang University in 2021.
Electronic Design Automation in 3D IC
3D IC Physical Design
Heterogeneous Accelerator Design
Software-Hardware Co-Design
Jul/2026: Start my internship in Huawei HKRC EDA Lab, continue working on 3D IC EDA.
May/2026: Our collaboration project with Huawei HKRC in 3D IC automated placement and routing algorithms design and implementation is awarded as outstanding collaboration project in Huawei!
Feb/2024: Congratulation! Our work on Winograd Convolution FPGA IP Generation has been accepted by DAC 2024!
[C3] Shuo Yin, Jiahao Xu, Jiaxi Jiang, Mingjun Li, Yuzhe Ma, Tsung-Yi Ho, Bei Yu, “G-Contour: GPU Accelerated Contour Tracing For Large-Scale Layouts”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Munich, Oct. 26–30, 2025.
[C2] Mingjun Li*, Pengjia Li*, Shuo Yin, Shixin Chen, Beichen Li, Chong Tong, Jianlei Yang, Tinghuan Chen, Bei Yu, “WinoGen: A Highly Configurable Winograd Convolution IP Generator for Efficient CNN Acceleration on FPGA”, ACM/IEEE Design Automation Conference (DAC), 2024.
[C1] Mingjun Li, Jianlei Yang, Yingjie Qi, Meng Dong, Yuhao Yang, Runze Liu, Weitao Pan, Bei Yu, Weisheng Zhao, “Eventor: An Efficient Event-Based Monocular Multi-View Stereo Accelerator on FPGA Platform”, ACM/IEEE Design Automation Conference (DAC), 2022.
[J4] Yang Bai, Mingjun Li, Yuhao Ji, Bei Yu, “Co-exploration of Hardware Acceleration and Tensor Programs via Unified Compilation Interface”, accepted by ACM Transactions on Design Automation of Electronic Systems (TODAES).
[J3] Lancheng Zou, Shuo Yin, Mingjun Li, Mingzi Wang, Chen Bai, Wenqian Zhao, Bei Yu, “Oiso: Outlier-isolated Data Format for Low-bit Large Language Model Quantization”, accepted by IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).
[J2] Jiaxi Jiang, Yuan Pu, Mingjun Li, Yuxuan Zhao, Peiyu Liao, Zuodong Zhang, Yibo Lin, Bei Yu, “RegPlace: Regularity-aware Placement for Full-System DNN Accelerator Designs”, accepted by IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).
[J1] Yang Bai, Mingjun Li, Wendong Xu, Bei Yu, “A Learned Performance Model with Transfer Learning Across GPUs on Tensorized Instructions”, accepted by IEEE Transactions on Parallel and Distributed Systems (TPDS).
Ph.D., Department of Computer Science and Engineering, The Chinese University of Hong Kong (CUHK), Aug/2023 - Now
Research Assistant, School of Computer Science and Engineering, Beihang University (BUAA), Jun/2021 - Jun/2023
B.Eng., School of Automation Science and Engineering, Beihang University (BUAA), Sep/2017 - Jun/2021
Huawei Hong Kong Research Center Hong Kong SAR
Intern in EDA Lab, 2012 Lab, Jul. 2026 - Current
On-site University-side Research Collaborator, May. 2025 – April. 2026
SmartMore Shenzhen, China
Intern in the R&D Department, Aug. 2022 - Jun. 2023
| Full Postgraduate Studentship, | The Chinese University of Hong Kong, | 2023-2027 |
Languages: C/C++, Python, Verilog, Chisel, Tcl, Matlab
Tools : Xilinx Vivado Design Suite, Synopsys Design Compiler, Cadence Innovus, ROS, LaTeX